Senior Physical Design EngineerCategoryChip DesignLocationAustin, TXExperienceMore than 8 Years Work Expe.EducationMaster's DegreeJob DescriptionMediaTek is a global fabless semiconductor industry leader, providing solutions from the edge to the cloud and powering over 2 billion connected devices every year. Established in 1997, our leading-edge technologies keep the world connected and enhance everyday life. At the forefront of innovation, MediaTek drives advancements in transformative technologies such as AI, 5G/6G, and Wi-Fi 8. Our high-performance, power-efficient solutions form the foundation for a smarter, more connected world, enabling devices from smartphones, smart homes, and AI PCs to high-performance computing, automotive, and AI data centers. As a trusted partner to the world's leading brands, we are committed to ensuring access to world-class technology for everyone. Our dedication to accelerating AI underscores our mission to enrich the future of humanity.About the RoleWe are seeking a Senior Physical Design Engineer to drive Advanced Place & Route (APR) and physical verification (PV) signoff for high-performance CPU cores in 3nm and other leading-edge technology nodes. In this role, you will own critical implementation stages—from early PPA evaluation and risk assessment to advanced clock tree design and signoff—helping us deliver highly optimized, silicon-proven CPU solutions.Key ResponsibilitiesPerform APR implementation and PV signoff for high-performance CPU designs in 3nm and other advanced technology nodes.Develop and optimize advanced clock tree structures to meet stringent performance, power, and skew/jitter targets.Conduct early-stage PPA evaluation and risk assessment to guide architectural and implementation decisions.Collaborate with front-end design, STA, IR/EM, and verification teams to close timing, power, and physical design issues.Support and enhance design methodologies and flows to improve quality, scalability, and turnaround time.Main Requirements and QualificationsBachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field (or equivalent experience).Minimum of 5 years of hands-on experience in physical design implementation (APR) for complex SoCs or IP.Strong scripting skills in Perl, Python, TCL, and Make for flow automation and productivity improvement.Solid understanding of physical design concepts, including floorplanning, placement, CTS, routing, and signoff.Experience with CPU physical implementation is a strong plus.Additional experience with Synthesis, Formal Equivalence Checking, flow automation, IR analysis, and STA analysis is highly desirable.Effective communication and teamwork skills, with the ability to work in a cross-functional, global environment.If you are passionate about pushing the limits of performance and efficiency on the most advanced technology nodes, we invite you to apply and help shape MediaTek’s next generation of high-performance CPU products.Work Location: This job must be performed on-site at our Austin, TX office. Hybrid working schedule: Monday to Thursday work on-site, and Friday work from home.Salary range: $128,600 - $217,200 annually.Employee may be eligible for performance bonus, short and long term incentive programs. Actual total compensation will be dependent upon the individual's skills, experience and qualifications. In addition, MediaTek provides a variety of benefits including comprehensive health insurance coverage, life and disability insurance, savings plan, Company paid holidays, Paid time off (PTO), Parental leave, 401K and more.MediaTek is an Equal Opportunity Employer that is committed to inclusion and diversity to all, regardless of age, ancestry, color, disability (mental and physical), exercising the right to family care and medical leave, gender, gender expression, gender identity, genetic information, marital status, medical condition, military or veteran status, national origin, political affiliation, race, religious creed, sex (includes pregnancy, childbirth, breastfeeding and related medical conditions), and sexual orientation.#LI-BJ1
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